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rev. 1.3 november 2009 www.aosmd.com page 1 of 15 aoz1057 ezbuck? 3a simple buck regulator general description the aoz1057 is a high efficiency, simple to use, 3a buck regulator. the aoz1057 works from a 4.5v to 16v input voltage range, and provides up to 3a of continuous output current with an output voltage adjustable down to 0.8v. the aoz1057 comes in an so-8 package and is rated over a -40c to +85c ambient temperature range. features 4.5v to 16v operating input voltage range 40m ? internal pfet switch for high efficiency: up to 95% externally soft start output voltage adjustable to 0.8v 3a continuous output current fixed 340khz pwm operation cycle-by-cycle current limit short-circuit protection output over voltage protection thermal shutdown small size so-8 package applications point of load dc/dc conversion pcie graphics cards set top boxes dvd drives and hdd lcd panels cable modems telecom/networking/datacom equipment typical application figure 1. 3.3v/3a buck regulator lx vin css82nf ss vout 3.3v fb pgnd en u1 comp agnd c122f ceramic c2, c322f ceramic c5 r1r2 d1 r c c c l16.8h vin aoz1057 downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 2 of 15 ordering information all aos products are offered in packages with pb-free plating and compliant to rohs standards. parts marked as green products (with l suffix) use r educed levels of halogens, and are also rohs compliant. please visit www.aosmd.com/web/qualit y/rohs_compliant.jsp for additional information. pin configurationpin description part number ambient temperature range package environmental AOZ1057AIL -40c to +85c so-8 rohs compliant green product pin number pin name pin function 1v in supply voltage input. when v in rises above the uvlo thresh old the device starts up. 2 ss soft-start pin. connect a capacitor from ss to gnd to set the soft-start period. minimum external soft-start capacitor 780pf is required, and the corresponding soft-start time is about 100s. 3 agnd reference connection for controller section. also used as thermal connection for controller section. electrically needs to be connected to pgnd. 4 comp external loop compensation pin. 5 fb the fb pin is used to determine the output vo ltage via a resistor divider between the output and gnd. 6 en the enable pin is active high. connect en pin to v in if not used. do not leave the en pin floating. 7 lx pwm output connection to inductor . thermal connection for output stage. 8 pgnd power ground. electrically needs to be connected to agnd. pgndlx en fb 12 3 4 vin ss agnd comp so-8 (top view) 87 6 5 downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 3 of 15 block diagram 350khz oscillator agnd pgnd vin en fb ss comp lx otp internal +5v ilimit pwm control logic 5v ldo regulator uvlo & por reference & bias 0.8v 5a 0.96v q1 pwm comp level shifter + fet driver isen eamp + ? + ? + ? + over voltage protection comparator + ? downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 4 of 15 absolute maximum ratings exceeding the absolute maximum ratings may damage the device. recommend operating ratings the device is not guaranteed to operate beyond the maximum operating ratings. electrical characteristicst a = 25c, v in = v en = 12v, v out = 3.3v unless otherwise specified (2 ) note: 2. specification in bold indicate an ambient temperature range of -40c to +85c. these specifications are guaranteed by design. parameter rating supply voltage (v in ) 18v lx to agnd -0.7v to v in +0.3v en to agnd -0.3v to v in +0.3v fb to agnd -0.3v to 6v comp to agnd -0.3v to 6v pgnd to agnd -0.3v to +0.3v junction temperature (t j ) +150c storage temperature (t s ) -65c to +150c parameter rating supply voltage (v in ) 4.5v to 16v output voltage range 0.8v to v in ambient temperature (t a ) -40c to +85c package thermal re sistance so-8 ( ja )1 0 5 c / w symbol parameter conditions min. typ. max. units v in supply voltage 4.5 16 v v uvlo input under-voltage lockout threshold v in rising v in falling 4.003.70 v i in supply current (quiescent) i out = 0, v fb = 1.2v, v en >1.2v 23 ma i off shutdown supply current v en = 0v 11 0 a v fb feedback voltage 0.782 0.8 0.818 v load regulation 0.5 % line regulation 0.5 % i fb feedback voltage input current 200 na v en en input threshold off threshold on threshold 2.0 0.6 v v hys en input hysteresis 100 mv modulator f o frequency 306 340 374 khz d max maximum duty cycle 100 % d min minimum duty cycle 6% error amplifier voltage gain 500 v / v error amplifier transconductance 200 a / v protection i lim current limit 3.5 5 a v pr output over-voltage protection threshold off threshold on threshold 960 860 mv t j over-temperature shutdown limit t j rising t j falling 150 100 c i ss soft start charge current 5 a output stage high-side switch on-resistance v in = 12v v in = 5v 4065 5085 m ? downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 5 of 15 typical performance characteristics circuit of figure 1. t a = 25c, v in = v en = 12v, v out = 3.3v unless otherwise specified. light load (dcm) operation full load (ccm) operation startup to full load short circuit protection 50% to 100% load transient short circuit recovery 2s/di v 2s/di v 4ms/di v 10ms/di v 400s/di v 10ms/di v vin ripple0.1v/div vo ripple 20mv/div vo 2v/div lin 1a/div vo2v/div lin 1a/div vo ripple50mv/div lo 1a/div vo2v/div il 1a/div vlx5v/div vin ripple0.1v/div vo ripple 20mv/div vlx 5v/div downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 6 of 15 efficiency efficiency (v in = 12v) vs. load current 75 80 85 90 95 3.3v output 5.0v output 8.0v output 100 0 0.5 1.0 1.5 2.0 2.5 3.0 load current (a) efficieny (%) downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 7 of 15 detailed description the aoz1057 is a current-mode step down regulator with integrated high side pmos switch. it operates from a 4.5v to 16v input voltage range and supplies up to 3a of load current. the duty cycle can be adjusted from 6% to 100% allowing a wide range of output voltages. features include enable control, under voltage lockout, external soft-start, output over-voltage protection, over-current protection and thermal shut down. the aoz1057 is available in an so-8 package. enable and soft start the aoz1057 has an external soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. a soft start process begins when the input voltage rises to 4.0v and voltage on en pin is high. in soft start process, a 5a internal current source charges the external capacitor at ss. as the ss capacitor is charged, the voltage at ss rises. the ss voltage clamps the reference voltage of the error ampli- fier, therefore output voltage rising time follows the ss pin voltage. with the slow ramping up output voltage, the inrush current can be prevented. minimum external soft-start capacitor required is 850pf, and the corresponding soft-start time is about 100s. the graph below shows the soft-start capacitance and the corre- sponding soft-start time. a simple equation can also be used to choose the soft- start capacitor according to the desired soft-start time: the en pin of the aoz1057 is active high. connect the en pin to v in if enable function is not used. pulling en to ground will disable the aoz1057. do not leave it open. the voltage on en pin must be above 2.0v to enable the aoz1057. when voltage on en pin falls below 0.6v, the aoz1057 is disabled. if an appli cation circuit requires the aoz1057 to be disabled, an open drain or open collector circuit should be used to interface to the en pin. steady-state operation under steady-state conditions , the converter operates in fixed frequency and continuous-conduction mode (ccm). the aoz1057 integrates an internal p-mosfet as the high-side switch. inductor curre nt is sensed by amplifying the voltage drop across the drain to source of the high side power mosfet. output voltage is divided down by the external voltage divider at the fb pin. the difference of the fb pin voltage and reference is amplified by the internal transconductance error amplifier. the error volt- age, which shows on the comp pin, is compared against the current signal, which is sum of inductor current signal and ramp compensation signal, at pwm comparator input. if the current signal is less than the error voltage, the internal high-side switch is on. the inductor current flows from the input through the inductor to the output. when the current signal exceeds the error voltage, the high-side switch is off. the inductor current is freewheel- ing through the external schottky diode to output. the aoz1057 uses a p-channel mosfet as the high side switch. it saves the bootstrap capacitor normally seen in a circuit which is using an nmos switch. it allows 100% turn-on of the upper switch to achieve linear regulation mode of operation. the minimum voltage drop from v in to v o is the load current x dc resistance of mosfet + dc resistance of buck inductor. it can be calculated by equation below : where; v o_max is the maximum output voltage, v in is the input voltage from 4.5v to 16v, i o is the output current from 0a to 3a, r ds(on) is the on resistance of in ternal mosfet, the value is between 40m ? and 70m ? depending on input voltage and junction temperature, and r inductor is the inductor dc resistance. switching frequency the aoz1057 switching frequency is fixed and set by an internal oscillator. the swit ching frequency is set inter- nally at 340khz. css nf () 6.9 tss ms () 0 2 4 02 04 0 soft-start capacitor (nf) 60 80 100 6 8 10 12 14 16 soft-start time (ms) v o_max v in i o r ds on () r inductor + () ? = downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 8 of 15 output voltag e programming output voltage can be set by feeding back the output to the fb pin with a resistor divider network. in the application circuit shown in figure 1. the resistor divider network includes r 1 and r 2 . usually, a design is started by picking a fixed r 2 value and calculating the required r 1 with equation below. some standard values of r 1 and r 2 for most commonly used output voltage values are listed in table 1. table 1. the combination of r 1 and r 2 should be large enough to avoid drawing excessive current from the output, which will cause power loss. since the switch duty cycle ca n be as high as 100%, the maximum output voltage can be set as high as the input voltage minus the voltage drop on upper pmos and inductor. protection features the aoz1057 has multiple protection features to prevent system circuit damage under abnormal conditions. over current protection (ocp) the sensed inductor current si gnal is also used for over current protection. since the aoz1057 employs peak current mode control, the comp pin voltage is proportional to the peak inductor current. the comp pin voltage is limited to be between 0.4v and 2.5v internally. the peak inductor current is automatically limited cycle by cycle. the cycle-by-cycle current limit threshold is set between 3.5a and 5a. when the load current reaches the current limit threshold, the cycle-by-cycle current limit circuit turns off the high side switch immediately to terminate the current duty cycle. the inductor current stop rising. the cycle-by-cycle current limit protection directly limits inductor peak current. the average inductor current is also limited due to the limitation on peak inductor cur- rent. when cycle-by-cycle current limit circuit is triggered, the output voltage drops as the duty cycle decreases. the aoz1057 has internal short circuit protection to protect itself from catastrophic failure under output short circuit conditions. the fb pin voltage is proportional to the output voltage. whenever fb pin voltage is below 0.2v, the short circuit protection circ uit is triggered. as a result, the converter is shut down and hiccups. the converter will start up via a soft start once the short circuit condition disappears. in short circuit protection mode, the inductor average current is greatly reduced. uvlo a uvlo circuit monitors the input voltage. when the input voltage exceeds 4v, the converter starts operation. when input voltage falls below 3.7v, the converter will stop switching. output over voltage protection (ovp) the aoz1057 monitors the feedback voltage: when the feedback voltage is higher than 960mv, it immediately turns-off the pmos to protect the output voltage over- shoot at fault condition. when feedback voltage is lower than 840mv, the pmos is allowed to turn on in the next cycle. thermal protection an internal temperature sensor monitors the junction temperature. it shuts down the internal control circuit and high side pmos if the junction temperature exceeds 150c. the regulator will restart automatically under the control of soft-start circuit w hen the junction temperature decreases to 100c. application information the basic aoz1057 application circuit is shown in figure 1. component selection is explained below. input capacitor the input capacitor must be connected to the v in pin and pgnd pin of the aoz1057 to maintain steady input voltage and filter out the pulsing input current. the voltage rating of input capacitor must be greater than maximum input voltage + ripple voltage. the input ripple voltage can be approximated by equation below: v o (v) r 1 (k ? ) r 2 (k ? ) 0.8 1.0 open 1.2 4.99 10 1.5 10 11.5 1.8 12.7 10.2 2.5 21.5 10 3.3 31.6 10 5.0 52.3 10 v o 0.8 1 r 1 r 2 ------ - + ?? ?? ?? = v in i o fc in ----------------- 1 v o v in -------- - ? ?? ?? ?? v o v in -------- - = downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 9 of 15 since the input current is discontinuous in a buck converter, the current stress on the input capacitor is another concern when selecting the capacitor. for a buck circuit, the rms value of input capacitor current can be calculated by: if let m equal the conversion ratio: the relationship between the input capacitor rms current and voltage conversion ratio is calculated and shown in figure 2 on the next page. it can be seen that when v o is half of v in , c in is under the worst current stress. the worst current stress on c in is 0.5 x i o . figure 2. i cin vs. voltage conversion ratio for reliable operation and best performance, the input capacitors must have current rating higher than i cin_rms at worst operating conditions. ceramic capacitors are preferred for input capacitors because of their low esr and high ripple current rating. depending on the application circuits, other low esr tantalum capacitor or aluminum electrolytic capacitor may also be used. when selecting ceramic capacitors, x5r or x7r type dielectric ceramic capacitors are preferred for their better temperature and voltage characteristics. note that the ripple current rating from capacitor manufacturers is based on certain amount of life time. further de-rating may be necessary for practical design requirement. inductor the inductor is used to supply constant current to output when it is driven by a switching voltage. for given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is, the peak inductor current is: high inductance gives low inductor ripple current but requires larger size inductor to avoid saturation. low ripple current reduces inductor core losses. it also reduces rms current through inductor and switches, which results in less conduction loss. when selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. the inductor takes the highest current in a buck circuit. the conduction loss on inductor needs to be checked for thermal and efficiency requirements. surface mount inductors in different shape and styles are available from coilcraft, elytone and murata. shielded inductors are small and radiate less emi noise. but they cost more than unshielded inductors. the choice depends on emi requirement, price and size. output capacitor the output capacitor is selected based on the dc output voltage rating, output ripple voltage specification and ripple current rating. the selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. de-rating needs to be considered for long term reliability. output ripple voltage specification is another important factor for selecting the output capacitor. in a buck converter circuit, output ripp le voltage is determined by inductor value, switching frequency, output capacitor value and esr. it can be calculated by the equation below: where; c o is output capacitor value, and esr co is the equivalent series resistor of output capacitor. when a low esr ceramic capacitor is used as the output capacitor, the impedance of th e capacitor at the switching frequency dominates. output ripple is mainly caused by capacitor value and inductor ripple current. the output ripple voltage calculation can be simplified to: i cin_rms i o v o v in -------- - 1 v o v in -------- - ? ?? ?? ?? = v o v in -------- - m = 0 0.1 0.2 0.3 0.4 0.5 0 0.5 1 m i cin_rms (m) i o i l v o fl ---------- - 1 v o v in -------- - ? ?? ?? ?? = i lpeak i o i l 2 -------- + = v o i l esr co 1 8 fc o ------------------------- + ?? ?? = v o i l 1 8 fc o ------------------------- = downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 10 of 15 if the impedance of esr at switching frequency dominates, the output ripple voltage is mainly decided by capacitor esr and inductor ripple current. the output ripple voltage calculation can be further simplified to: for lower output ripple voltage across the entire operating temperature range, x5r or x7r dielectric type of ceramic, or other low esr tantalum c apacitor or aluminum electro- lytic capacitor may also be used as output capacitors. in a buck converter, the output capacitor current is continuous. the rms current of output capacitor is decided by the peak-to-peak inductor ripple current. it can be calculated by: usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. when the buck inductor is selected to be very small and inductor ripple current is high, output capacitor could be overstressed. schottky diode selection the external freewheeling diode supplies the current to the inductor when the high side pmos switch is off. to reduce the losses due to the forward voltage drop and recovery of diode, schottky diode is recommended to use. the maximum reverse voltage rating of the chosen schottky diode should be grea ter than the maximum input voltage, and the current rating should be greater than the maximum load current loop compensation the aoz1057 employs peak current mode control for easy use and fast transient response. peak current mode control eliminates the double pole effect of the output l&c filter. it greatly simplifies the compensation loop design. with peak current mode control, the buck power stage can be simplified to be a one-pole and one-zero system in frequency domain. the pole is dominant pole and can be calculated by: the zero is a esr zero due to output capacitor and its esr. it is can be calculated by: where; c o is the output filter capacitor, r l is load resistor value, and esr co is the equivalent series resi stance of output capacitor. the compensation design is actually to shape the converter close loop transfer function to get desired gain and phase. several different types of compensation network can be used for the aoz1057. for most cases, a series capacitor and resistor network connected to the comp pin sets the pole-zero and is adequate for a stable high-bandwidth control loop. in the aoz1057, fb pin and comp pin are the inverting input and the output of internal transconductance error amplifier. a series r and c compensation network connected to comp provides one pole and one zero. the pole is : where; g ea is the error amplifier transconductance, which is 200 x 10 -6 a/v, g vea is the error amplifier voltage gain, which is 500 v/v, and c c is compensati on capacitor. the zero given by the external compensation net- work, capacitor c c and resistor r c is located at: to design the compensation circuit, a target crossover frequency f c for close loop must be selected. the system crossover frequency is where control loop has unity gain. the crossover frequency is also called the converter bandwidth. generally a higher bandwidth means faster response to load transient. however, the bandwidth should not be too high becau se of system stability concern. when designing the compensation loop, converter stability under all li ne and load condition must be considered. usually, it is recommended to set the bandwidth to be less than 1/10 of switching frequency. the strategy for choosing r c and c c is to set the cross over frequency with r c and set the compensator zero with c c . using selected crossover frequency, f c , to calculate r c : v o i l esr co = i co_rms i l 12 ---------- = f p 1 1 2 c o r l ---------------------------------- - = f z 1 1 2 c o esr co ------------------------------------------------ = f p 2 g ea 2 c c g vea ------------------------------------------ - = f z 2 1 2 c c r c ----------------------------------- = r c f c v o v fb ---------- 2 c o g ea g cs ----------------------------- - = downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 11 of 15 where; f c is desired crossover frequency, v fb is 0.8v, g ea is the error amplifier transconductance, which is 200x10 -6 a/v, and g cs is the current sense circui t transconductance, which is 6.68 a/v. the compensation capacitor c c and resistor r c together make a zero. this zero is put somewhere close to the dominate pole fp1 but lower than 1/5 of selected crossover frequency. c c can is selected by: the previous equation above can also be simplified to: an easy-to-use application software which helps to design and simulate the compensation loop can be found at www.aosmd.com . thermal management and layout consideration in the aoz1057 buck regulator circuit, high pulsing current flows through two circuit loops. the first loop starts from the input capacitors, to the v in pin, to the lx pin, to the filter inductor, to the output capacitor and load, and then return to the input capacitor through ground. current flows in the first loop when the high side switch is on. the second loop starts from inductor, to the output capacitors and load, to the anode of the schottky diode, to the cathode of schottky diode. current flows in the second loop when the low side diode is on. in the pcb layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. a ground plane is strongly recommended to connect input capaci- tor, output capacitor, and pgnd pin of the aoz1057. in the aoz1057 buck regulator circuit, the major power dissipating components are the aoz1057, the schottky diode and the output inductor. the total power dissipation of converter circuit can be measured by input power minus output power. the power dissipation in schottky can be approximated as: where; v fw_schottky is the schottky diode forward voltage drop. the power dissipation of inductor can be approximately calculated by output current and dcr of inductor. the actual aoz1057 junction temperature can be calculated with power diss ipation in the aoz1057 and thermal impedance from junction to ambient. the maximum junction tem perature of aoz1057 is 150c, which limits the maximu m load current capability. the thermal performance of the aoz1057 is strongly affected by the pcb layout. extra care should be taken by users during design proces s to ensure that the ic will operate under the recommended environmental conditions. several layout tips are listed below for the best electric and thermal performance. figure 3 on the next page illustrates a pcb layout example as reference. 1. do not use thermal relief connection to the v in and the pgnd pin. pour a maximized copper area to the pgnd pin and the v in pin to help thermal dissipation. 2. input capacitor should be connected to the v in pin and the pgnd pin as close as possible. 3. a ground plane is preferred. if a ground plane is not used, separate pgnd from agnd and connect them only at one point to avoid the pgnd pin noise coupling to the agnd pin. 4. make the current trace from lx pin to l to co to the pgnd as short as possible. 5. pour copper plane on all unused board area and connect it to stable dc nodes, like vin, gnd or vout. 6. the lx pin is connected to internal pfet drain. they are low resistance thermal conduction path and most noisy switching node. connected a copper plane to lx pin to help thermal dissipation. this copper plane should not be too larger otherwise switching noise may be coupled to other part of circuit. 7. keep sensitive signal tr ace far away form the lx pin. c c 1.5 2 r c f p 1 ---------------------------------- - = c c c o r l r c --------------------- = p total_loss v in i in v o i o ? = p diode_loss i o 1 d ? () v fw_schottky = p inductor_loss i o 1 d ? () v fw_schottky = t junction p total_loss p diode_loss p inductor_loss ? ? () ja t amb + = downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 12 of 15 figure 3. aoz1057 pcb layout so-8 12 34 87 65 ss agnd comp pgnd lx en fb cout cc rc r2 r1 l cin vin css vo vo downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 13 of 15 package dimensions, so-8 notes:1. all dimensions are in millimeters. 2. dimensions are inclusive of plating 3. package body sizes exclude mold flash and gate burrs. mold flash at the non-lead sides should be less than 6 mils. 4. dimension l is measured in gauge plane. 5. controlling dimension is millimeter, converted inch dimensions are not necessarily exact. symbols a a1a2 b c d e1 e e hl dimensions in millimeters min. 1.350.10 1.25 0.31 0.17 4.80 3.80 5.80 0.25 0.40 0 d c l h x 45 7 (4x) b 2.20 5.74 0.80 unit: mm 1.27 a1 a2 a 0.1 gauge plane seating plane 0.25 e 81 e1 e nom. 1.65 ? 1.50 ?? 4.903.90 1.27 bsc 6.00 ?? ? max. 1.750.25 1.65 0.51 0.25 5.00 4.00 6.20 0.50 1.27 8 symbols a a1a2 b c d e1 e e hl dimensions in inches min. 0.0530.004 0.049 0.012 0.007 0.189 0.150 0.228 0.010 0.016 0 nom. 0.065 ? 0.059 ?? 0.1930.154 0.050 bsc 0.236 ?? ? max. 0.0690.010 0.065 0.020 0.010 0.197 0.157 0.244 0.020 0.050 8 downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 14 of 15 tape and reel dimensions, so-8 carrier tapereel tape s ize 12mm reel s ize ? 33 0 m ? 33 0.00 0.50 package s o- 8 (12mm) a0 6.40 0.10 b0 5.20 0.10 k0 2.10 0.10 d0 1.60 0.10 d1 1.50 0.10 e 12.00 0.10 e1 1.75 0.10 e2 5.50 0.10 p0 8 .00 0.10 p1 4.00 0.10 p2 2.00 0.10 t 0.25 0.10 n ?97.00 0.10 k0 unit: mm b0 g m w1 s k h n w v r tr a iler t a pe 3 00mm min. or 75 empty pocket s component s t a pe orient a tion in pocket le a der t a pe 500mm min. or 125 empty pocket s a0 p1 p2 feeding direction p0 e2 e1 e d0 t d1 w 1 3 .00 0. 3 0 w1 17.40 1.00 h ?1 3 .00 +0.50/-0.20 k 10.60 s 2.00 0.50 g ? r ? v ? leader/trailer and orientation unit: mm downloaded from: http:///
aoz1057 rev. 1.3 november 2009 www.aosmd.com page 15 of 15 as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provid ed in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. life support policy alpha & omega semiconductor products are not authorized for use as critical components in life supp ort devices or systems. aoz1057 package marking z1057ai fay part numberunderline denotes green product assembly lot code fab & assembly location year & week code wlt downloaded from: http:///

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